Open the project file, change a part, see what the tool did, keep working after the AI has had its turn. That’s what interests me in JLC’s board-design tools. Editable files mean you can carry the design through the next revision yourself.
For us (Limor, me, and some of the other folks experimenting and documenting some of these new tools), the interesting part is reducing the work between a prototype and something we can manufacture repeatedly. Making one is a start. Then you have to make another one, and it would be nice if the second board didn’t need its own exorcism. I feel like this will help get some protos out of proto purgatory.
That’s why the latest from JLC is what everyone is going to do eventually. It just hasn’t been distributed yet. JLC’s fourth Spark conference took place September 19, 2026, at the Futian Convention and Exhibition Center in Shenzhen. There were open-source hardware projects, manufacturers, and people making AI devices. The JLC preso shows design software, PCB fabrication and assembly, mechanical parts, and startup support closer together. They also outlined a seed-investment program. Not three-e Seeed. Seed, as in they will invest in things.
A new .eprj3 format stores project data as JSON and text, so you can use Git diffs and edit the files, including with AI tools. EasyEDA can still open the project. The AI design tools are worth watching, particularly because the resulting projects remain editable. I’d say open source has a solid and stable home in hardware. I totally get that a lot of companies and people are going to need to make huge ego-killing adjustments to how they work.
We’ve all used autocorrect and more for years. Same things, new tools. With a board, of course, the suggestion can end up as copper. Say a tool changes a connection – I want to look at that change before ordering anything. A text diff is a starting point for that review. It won’t do the electrical checking for us. We do that in other ways, with hardware in the loop and lots of testing in general. We made 4- and 7-port super-hubs to help. This all lines up.
JLC showed CLI operations for schematics, PCBs, BOM exports, Gerbers, and placement coordinates. There’s a published skill for creating editable projects already. This is the sort of thing that makes a command prompt look suspiciously like a door into a factory.
The headless CLI/MCP agent integration is still marked in progress. Public beta planned for 2026. Fully autonomous design sits farther along the roadmap as a future vision, so keep those stages separate when looking at the slides. It’s not here yet, and it’s a when, not an if.
The immediate opportunity for some folks will be scriptable, reviewable board design connected to manufacturing. Electrical checks and board checks stay in the process. So does looking at the actual files headed to the factory. Some of the future of manufacturing is already in Shenzhen, again, so ready or not, here it comes.
A couple of other things in the photos: D-Robotics reported four BPU cores, 560 TOPS, and 47.6 FPS for SmolVLA on the S600. The TOPS figure is INT8; the SmolVLA result is from the presentation, not a benchmark we’ve reproduced. More compute for robots, more chances for them to do something useful (make robot friends).
The 55 nm open PDK exhibit was an existing research project. ICsprout’s documentation calls the current status a preview for research and small-batch test tape-outs. More people drawing on silicon is an appealing prospect.
Here’s the PDF I made with translation help… it’s 45 pages, 18.4 MB, collected from conference photos and posts by @tks and @akita11. Each page links to its source post. There are translations and notes alongside the original photographs. It’s a compilation of their coverage, not an official JLC transcript. I live-watched it over X (Twitter). Not sure what that is called now. Not X, the live-watching. Live X’ing?
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