Reverse engineering the TI-84 Plus OS

Ben Siraphob is currently working on a reproducible Ghidra reverse-engineering project for the TI-84 Plus calculator OS (version 2.55MP), a Zilog Z80 system.

A Z80 (64 KiB address space) with hardware paging maps flash page 0 at 0000 (the kernel: RST vectors, the bcall dispatcher, FP/VAT/memory core) and swaps other 16 KiB flash pages into 4000 on demand. Code reaches routines on other pages via bcalls (rst 28h + a 2-byte ID resolved through a jump table on flash page 0x3B).

The OS is a single-tasking context machine: a main event loop runs the active context’s handlers, switching contexts by key. All arithmetic flows through a 9-byte BCD floating-point engine (OP1–OP6); named objects live in the VAT; TI-BASIC is stored as 1/2-byte tokens executed by the parser on page 0x38.

See a detailed outline of the reverse engineering here and the GitHub repo here.

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